EE Times Europe reports … the test cases developed earlier in the design process can be reused to test the final implementation. Hence, testing and verification of the design against requirements happens throughout the process instead of at the end. For example, engineers at BAE Systems working on a software defined radio (SDR) system were able to reduce their rework and overall development time by a factor of 10 using model-based design.
It typically took 645 hours for an engineer with years of VHDL coding experience to hand code a fully functional SDR waveform using the traditional design flow, whereas a second engineer with limited experience completed the same project using model-based design in fewer than 46 hours. This improvement was achieved because the model, in which the developer could include all satellite communications waveform details, was directly connected to the resulting code. With a complete executable model, engineers were able to discover and remove bugs early in the design flow instead of at the VHDL behavioral test stage.
