The European Commission Information and Communication Technologies (ICT) announced The EU-funded MORPHEUS project, which includes big manufacturers of embedded systems such as Thales, Thomson, Alcatel-Lucent, STMicroelectronics and Intracom, is exploring a new approach.
Pressure is coming mainly from high-performance applications that need to process huge amounts of data in a short time. Examples include digital video processing, telecoms, and military applications.
“This kind of equipment needs high computing performance for signal processing and for making decisions,” says Philippe Bonnot of Thales Research and Technology who is coordinating the MORPHEUS project. “But the solutions are not as efficient as we would like.”
“We tried to solve all these problems by merging a processor with reconfigurable units embedded in the same component,” says Bonnot. “We think we can both have the flexibility and the efficiency.”
Reconfigurable hardware can be programmed to connect itself in many different ways. When a new application is required, the hardware can be modified just as a piece of software can be altered to do a different job.
Early in 2009, partner STMicroelectronics produced the first prototypes of the MORPHEUS chip. It contains 97 million transistors and is expected to consume no more than one watt of power.
He expects there will be several modifications to the prototype before it can be considered for commercialisation. In the meantime, the SMEs in the project may be able to market one of the reconfigurable units and a compiler.
There is still more to do. Bonnot points out that the silicon technology used in the chip is several years old. “We only used 90 nanometre technology,” he says. “So with more aggressive technology we could get some better results – we could put more units on to the chip and we could have a higher clock frequency.”
The project website says The first release of the toolset has been demonstrated, including management of dynamic reconfiguration thanks to a combination of the Delft University MOLEN implementation on ACE COSY compiler and drivers implemented within the eCOS RTOS by Universität Karlsruhe and THALES. Design of configuration of M2000 eFPGA from high level C-based description was demonstrated, based on CriticalBlue CASCADE compiler, THALES SPEAR data mapping tool and MADEO tool by Université de Bretagne Occidentale. Alcatel-Lucent and Universität Chemnitz work on the SpecEdit tool are also available.
